最新免费av在线观看,亚洲综合一区成人在线,中文字幕精品无码一区二区三区,中文人妻av高清一区二区,中文字幕乱偷无码av先锋

OXMPCI952-LQAG Datasheet

  • OXMPCI952-LQAG

  • Integrated High Performance Dual UARTs, 8-bit Local Bus/Para...

  • 108頁

  • OXFORD

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

OXmPCI952 DATA SHEET
F
EATURES
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Dual 16C950 High performance UART channels
8-bit Pass-through Local Bus (PCI
Bridge)
IEEE1284 Compliant SPP/EPP/ECP parallel port
(with
external transceiver)
Efficient 32-bit, 33MHz, Multi-function target-only PCI
controller, fully compliant to PCI Local Bus specification 3.0,
and PCI Power Management Specification 1.1
PCI and miniPCI Modes
(with CLKRUN# and PME#
generation in the D3cold state, in miniPCI mode)
UARTs fully software compatible with 16C550-type devices.
UART operation up to 60 MHz via external clock source. Up
to 20MHz with the crystal oscillator.
Baud rates up to 60Mbps in external 1x clock mode and
15Mbps in asynchronous mode.
128-byte deep FIFO per transmitter and receiver
Flexible clock prescaler, from 1 to 31.875
Automated in-band flow control using programmable
Xon/Xoff in both directions
Automated out-of-band flow control using CTS#/RTS#
and/or DSR#/DTR#
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Integrated High Performance Dual UARTs,
8-bit Local Bus/Parallel Port.
3.3v PCI/miniPCI interface
.
Arbitrary trigger levels for receiver and transmitter FIFO
interrupts and automatic in-band and out-of-band flow
control
Infra-red (IrDA) receiver and transmitter operation
9-bit data framing, as well as 5,6,7 and 8 bits
Detection of bad data in the receiver FIFO
Global Interrupt Status and readable FIFO levels to facilitate
implementation of efficient device drivers.
Local registers to provide status/control of device functions.
11 multi-purpose I/O pins, which can be configured as input
interrupt pins or 鈥榳ake-up鈥?
Auto-detection of a wide range of Microwire
TM
compatible
EEPROMs, to configure device parameters.
Function access, to pre-configure each function prior to
handover to generic device drivers.
Operation via IO or memory mapping.
3.3V operation (5v tolerance on selected I/Os)
Extended Operating Temp. Range : -40C to 105C
160-pin LQFP/176-pin BGA package
D
ESCRIPTION
The OXmPCI952 is a single chip solution for PCI and mini-
PCI based serial and parallel expansion add-in cards. It is
a dual function PCI device, where function 0 offers two
ultra-high performance OX16C950 UARTs, and function 1
is configurable either as an 8-bit Local Bus or a bi-
directional parallel port.
Each UART channel in the OXmPCI952 is the fastest
available PC-compatible UART, offering data rates up to
15Mbps and 128-byte deep transmitter and receiver FIFOs.
The deep FIFOs reduce CPU overhead and allow
utilisation of higher data rates. Each UART channel is
software compatible with the widely used industry-standard
16C550 devices (and compatibles), as well as the
OX16C95x family of high performance UARTs. In addition
to increased performance and FIFO size, the UARTs also
provide the full set of OX16C95x enhanced features
including automated in-band flow control, readable FIFO
levels etc.
To enhance device driver efficiency and reduce interrupt
latency, internal UARTs have multi-port features such as
shadowed FIFO fill levels, a global interrupt source register
and Good-Data Status, readable in four adjacent DWORD
registers visible to logical functions in I/O space and
memory space.
Expansion of serial cards beyond two channels is possible
using the 8-bit pass-through Local Bus function. The
addressable space can be increased up to 256 bytes, and
divided into four chip-select regions. This flexible
expansion scheme caters for cards with up to 18 serial
ports using external 16C950, 16C952, 16C954 or
compatible devices, or composite applications such as
combined serial and parallel port expansion cards.
The parallel port is an IEEE 1284 compliant SPP/EPP/
ECP parallel port that fully supports the existing Centronics
interface. The parallel port can be enabled in place of the
Local Bus. An
external bus transceiver is required for 5V
parallel port operation.
The configuration register values are programmed using an
external Microwire
TM
compatible serial EEPROM. This
EEPROM can also be used to provide
function access,
to
pre-configure each UART into enhanced modes or pre-
configure devices on the local bus/parallel port, prior to any
PCI configuration accesses and before control is handed to
(generic) device drivers.
Oxford Semiconductor Ltd.
External鈥擣ree Release
25 Milton Park, Abingdon, Oxon, OX14 4SH, UK
Tel: +44 (0)1235 824900
Fax: +44(0)1235 821141
漏
Oxford Semiconductor 2005
OXmPCI952 DataSheet DS-0020 鈥?June 2005

OXMPCI952-LQAG相關(guān)型號(hào)PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！