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CY7C375i Datasheet

  • CY7C375i

  • UltraLogic 128-Macrocell Flash CPLD

  • Cypress

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USE ULTRA37000鈩?/div>
FOR ALL NEW DESIGNS
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. 鈥?5擄C to +150擄C
Ambient Temperature with
Power Applied............................................. 鈥?5擄C to +125擄C
Supply Voltage to Ground Potential ............... 鈥?.5V to +7.0V
DC Voltage Applied to Outputs
in High-Z State ............................................... 鈥?.5V to +7.0V
DC Input Voltage............................................ 鈥?.5V to +7.0V
DC Program Voltage .....................................................12.5V
CY7C375i
Output Current into Outputs ........................................ 16 mA
Static Discharge Voltage........................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... > 200 mA
Operating Range
Range
Commercial
Industrial
Military
[2]
V
CC
V
CCINT
V
CCIO
5V
鹵
0.25V 5V
鹵
0.25V or
3.3V
鹵
0.3V
鈭?0擄C
to +85擄C 5V
鹵
0.5V 5V
鹵
0.5V or
3.3V
鹵
0.3V
鈥?5擄C to +125擄C 5V
鹵
0.5V
Ambient
Temperature
0擄C to +70擄C
Electrical Characteristics
Over the Operating Range
[3, 4]
Parameter
V
OH
V
OHZ
V
OL
V
IH
V
IL
I
IX
I
OZ
I
OS
I
CC
Description
Output HIGH Voltage
Output HIGH Voltage with Output
Disabled
[9]
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Load Current
Output Leakage Current
Output Short Circuit Current
[8, 9]
Power Supply
Current
[10]
Test Conditions
V
CC
= Min. I
OH
= 鈥?.2 mA (Com鈥檒/Ind)
[5]
I
OH
= 鈥?.0 mA (Mil)
V
CC
= Max. I
OH
= 0
碌A(chǔ)
(Com鈥檒/Ind)
[5, 6]
I
OH
= 鈥?0
碌A(chǔ)
(Com鈥檒/Ind)
[5, 6]
V
CC
= Min. I
OL
= 16 mA (Com鈥檒/Ind)
[5]
I
OL
= 12 mA (Mil)
Guaranteed Input Logical HIGH voltage for all
inputs
[7]
Guaranteed Input Logical LOW voltage for all
inputs
[7]
V
I
= Internal GND, V
I
= V
CC
V
CC
= Max., V
O
= 3.3V, Output Disabled
[6]
V
CC
= Max., V
OUT
= 0.5V
V
CC
= Max., I
OUT
= 0 mA,
f = 1 MHz, V
IN
= GND, V
CC
Com鈥檒/Ind.
Com鈥檒 鈥淟鈥?鈥?6
Military
I
BHL
I
BHH
I
BHLO
I
BHHO
Input Bus Hold LOW Sustaining Current V
CC
= Min., V
IL
= 0.8V
Input Bus Hold HIGH Sustaining Current V
CC
= Min., V
IH
= 2.0V
Input Bus Hold LOW Overdrive Current V
CC
= Max.
Input Bus Hold HIGH Overdrive Current V
CC
= Max.
+75
鈥?5
+500
鈥?00
2.0
鈥?.5
鈥?0
0
鈥?0
125
75
125
鈥?0
7.0
0.8
+10
+50
鈥?25
200
125
250
4.0
3.6
0.5
Min.
2.4
Typ.
Max. Unit
V
V
V
V
V
V
V
V
碌A(chǔ)
碌A(chǔ)
碌A(chǔ)
mA
mA
mA
碌A(chǔ)
碌A(chǔ)
碌A(chǔ)
碌A(chǔ)
V
CC
= Max., V
O
= GND or V
O
= V
CC
, Output Disabled 鈥?0
鈥?60 mA
Capacitance
[9]
Parameter
C
I/O[11]
C
CLK
Description
Input/Output Capacitance
Clock Signal Capacitance
Test Conditions
V
IN
= 5.0V at f=1 MHz
V
IN
= 5.0V at f = 1 MHz
Min.
5
Max.
8
12
Unit
pF
pF
Notes:
2. T
A
is the 鈥渋nstant on鈥?case temperature.
3. See the last page of this specification for Group A subgroup testing information.
4. If V
CCIO
is not specified, the device can be operating in either 3.3V or 5V I/O mode; V
CC
=V
CCINT
.
5. I
OH
= 鈥? mA, I
OL
= 2 mA for SDO.
6. When the I/O is three-stated, the bus-hold circuit can weakly pull the I/O to a maximum of 4.0V if no leakage current is allowed. This voltage is lowered significantly by
a small leakage current. Note that all I/Os are three-stated during ISR programming. Refer to the application note 鈥淯nderstanding Bus Hold鈥?for additional information.
7. These are absolute values with respect to device ground. All overshoots due to system or tester noise are included.
8. Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. V
OUT
= 0.5V has been chosen to avoid test
problems caused by tester ground degradation.
9. Tested initially and after any design or process changes that may affect these parameters.
10. Measured with 16-bit counter programmed into each logic block.
11. C
I/O
for dedicated inputs, and for I/O pins with JTAG functionality is 12 pF,and for the ISR
EN
pin is 15 pF Max.
Document #: 38-03029 Rev. *A
Page 6 of 17

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  • 英文版
    16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
    Cypress
  • 英文版
    32K x 8/9 Dual-Port Static RAM
    Cypress
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
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    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...
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  • 英文版
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    16K x 16/18 Dual-Port Static RAM
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  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...

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