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MAX3053 Datasheet

  • MAX3053

  • " ?à80V Fault-Protected, 2Mbps, Low Supply Current CAN Tran...

  • Maxim   Maxim

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鹵80V Fault-Protected, 2Mbps,
Low Supply Current CAN Transceiver
MAX3053
TIMING CHARACTERISTICS
(V
CC
= +5V 鹵10%, R
L
= 60鈩? C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +5V and
T
A
= +25擄C.) (Figures 1, 2, and 3)
PARAMETER
SYMBOL
CONDITIONS
V
RS
= 0 (2Mbps)
Minimum Bit Time
t
BIT
R
RS
= 24k鈩?(500kbps)
R
RS
= 100k鈩?(125kbps)
R
RS
= 180k鈩?(62.5kbps)
Delay TXD to Bus Active
Delay TXD to Bus Inactive
t
ONTXD
t
OFFTXD
V
RS
= 0
V
RS
= 0
V
RS
= 0 (2Mbps)
Delay TXD to Receiver Active
t
ONRXD
R
RS
= 24k鈩?(500kbps)
R
RS
= 100k鈩?(125kbps)
R
RS
= 180k鈩?(62.5kbps)
V
RS
= 0 (2Mbps)
Delay TXD to Receiver Inactive
t
OFFRXD
R
RS
= 24k鈩?(500kbps)
R
RS
= 100k鈩?(125kbps)
R
RS
= 180k鈩?(62.5kbps)
R
RS
= 24k鈩?(500kbps)
Differential Output Slew Rate
Time to Wakeup: CANH > 9V
Time to Sleep Mode when Bus Is
Recessive
|SR|
t
WAKE
t
SHDN
R
RS
= 100k鈩?(125kbps)
R
RS
= 180k鈩?(62.5kbps)
SHDN
= GND, V
TXD
= V
CC
C
SHDN
= 100nF
10
14
7
1.6
10
47
碌s
ms
V/碌s
MIN
0.5
2
8
25
40
75
120
0.4
1.6
5.0
130
0.45
1.6
5.0
碌s
ns
碌s
ns
ns
ns
碌s
TYP
MAX
UNITS
Note 1:
As defined by ISOSHDN, bus value is one of two complementary logical values: dominant or recessive. The dominant value
represents the logical 1 and the recessive represents the logical 0. During the simultaneous transmission of the dominant
and recessive bits, the resulting bus value is dominant. For MAX3053 values, see the truth table in the
Transmitter
and
Receiver
sections.
Note 2:
The ESD structures do not short out CANH and CANL under an ESD event while -7V < CANH, CANL < +12V.
4
_______________________________________________________________________________________

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