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AM29LV160DB-120FC Datasheet

  • AM29LV160DB-120FC

  • Advanced Micro Devices [16 Megabit (2 M x 8-Bit/1 M x 16-Bi...

  • AMD

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Command Definitions
Table 9.
Command
Sequence
(Note 1)
Read (Note 6)
Reset (Note 7)
Manufacturer ID
Word
Byte
Word
Byte
Word
Byte
Word
4
Byte
1
4
3
2
2
6
6
1
1
AAA
55
AA
555
AAA
555
AAA
XXX
XXX
555
AAA
555
AAA
XXX
XXX
98
AA
AA
A0
90
AA
AA
B0
30
2AA
555
2AA
555
PA
XXX
2AA
555
2AA
555
55
55
PD
00
55
55
555
AAA
555
AAA
80
80
555
AAA
555
AAA
AA
AA
2AA
555
2AA
555
55
55
555
AAA
SA
10
30
555
AAA
555
AAA
A0
20
PA
PD
Cycles
Am29LV160D Command Definitions
Second
Addr Data
Bus Cycles (Notes 2鈥?)
Third
Fourth
Addr
Data Addr Data
Fifth
Addr Data
Sixth
Addr Data
1
1
4
4
4
Autoselect (Note 8)
Device ID,
Top Boot Block
Device ID,
Bottom Boot Block
Sector Protect Verify
(Note 9)
First
Addr Data
RA
RD
XXX
F0
555
AA
AAA
555
AA
AAA
555
AA
AAA
555
AA
2AA
555
2AA
555
2AA
555
2AA
55
55
55
555
AAA
555
AAA
555
AAA
555
90
90
90
X00
X01
X02
01
22C4
C4
2249
49
XX00
XX01
00
01
X01
X02
55
555
AAA
90
(SA)
X02
(SA)
X04
Word
Byte
Word
Program
Byte
Word
Unlock Bypass
Byte
Unlock Bypass Program (Note 11)
Unlock Bypass Reset (Note 12)
Word
Chip Erase
Byte
Word
Sector Erase
Byte
Erase Suspend (Note 13)
Erase Resume (Note 14)
CFI Query (Note 10)
Legend:
X = Don鈥檛 care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed.
Addresses latch on the falling edge of the WE# or CE# pulse,
whichever happens later.
Notes:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except for the read cycle and the fourth cycle of the
autoselect command sequence, all bus cycles are write
cycles.
4. Data bits DQ15鈥揇Q8 are don鈥檛 cares for unlock and
command cycles.
5. Address bits A19鈥揂11 are don鈥檛 cares for unlock and
command cycles, unless SA or PA required.
6. No unlock or command cycles required when reading array
data.
7. The Reset command is required to return to reading array
data when device is in the autoselect mode, or if DQ5 goes
high (while the device is providing status data).
8. The fourth cycle of the autoselect command sequence is a
read cycle.
9. The data is 00h for an unprotected sector and 01h for a
protected sector. See 鈥淎utoselect Command Sequence鈥?for
more information.
10. Command is valid when device is ready to read array data or
when device is in autoselect mode.
11. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
12. The Unlock Bypass Reset command is required to return to
reading array data when the device is in the unlock bypass
mode.
13. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend
mode. The Erase Suspend command is valid only during a
sector erase operation.
14. The Erase Resume command is valid only during the Erase
Suspend mode.
PD = Data to be programmed at location PA. Data latches on the
rising edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A19鈥揂12 uniquely select any sector.
24
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