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LT1167I Datasheet

  • LT1167I

  • Linear Technology [Single Resistor Gain Programmable, Preci...

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LT1167
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
Gain Error
G=1
G = 10 (Note 2)
G = 100 (Note 2)
G = 1000 (Note 2)
V
S
=
鹵15V,
V
CM
= 0V, 鈥?40擄C
鈮?/div>
T
A
鈮?/div>
85擄C, R
L
= 2k, unless otherwise noted. (Note 4)
CONDITIONS (Note 7)
q
q
q
q
q
q
q
q
LT1167AI
MIN
TYP
MAX
0.014
0.130
0.140
0.160
2
5
26
20
0.04
0.40
0.40
0.40
15
20
70
50
LT1167I
MIN
TYP
MAX
0.015
0.140
0.150
0.180
3
6
30
20
0.05
0.42
0.42
0.45
20
30
100
50
UNITS
%
%
%
%
ppm
ppm
ppm
ppm/擄C
G
N
Gain Nonlinearity (Notes 2, 4)
V
O
=
鹵10V,
G = 1
V
O
=
鹵10V,
G = 10 and 100
V
O
=
鹵10V,
G = 1000
G < 1000 (Note 2)
V
OST
= V
OSI
+ V
OSO
/G
G/T
V
OST
V
OSI
V
OSIH
V
OSO
V
OSOH
V
OSI
/T
V
OSO
/T
I
OS
I
OS
/T
I
B
I
B
/T
V
CM
CMRR
Gain vs Temperature
Total Input Referred
Offset Voltage
Input Offset Voltage
Input Offset Voltage Hysteresis
Output Offset Voltage
q
(Notes 3, 6)
q
20
3.0
180
30
0.05
0.8
110
0.3
180
0.5
鈥?V
S
+ 2.1
鈥?V
S
+ 2.1
75
500
0.3
5
550
600
+ V
S
鈥?1.3
+ V
S
鈥?1.4
鈥?V
S
+ 2.1
鈥?V
S
+ 2.1
25
3.0
200
30
0.06
1
120
0.3
220
0.6
100
600
0.4
6
700
800
+V
S
鈥?1.3
+ V
S
鈥?1.4
碌V
碌V
碌V
碌V
碌V/擄C
碌V/擄C
pA
pA/擄C
pA
pA/擄C
V
V
Output Offset Voltage Hysteresis (Notes 3, 6)
Input Offset Drift (RTI)
Output Offset Drift
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Bias Current Drift
Input Voltage Range
Common Mode Rejection Ratio
V
S
=
鹵2.3V
to
鹵5V
V
S
=
鹵5V
to
鹵18V
1k Source Imbalance,
V
CM
= 0V to
鹵10V
G=1
G = 10
G = 100
G = 1000
V
S
=
鹵2.3V
to
鹵18V
G=1
G = 10
G = 100
G = 1000
V
S
=
鹵2.3V
to
鹵5V
V
S
=
鹵5V
to
鹵18V
G = 1, V
OUT
=
鹵10V
(Note 3)
(Note 3)
(Note 3)
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
86
98
114
116
100
120
125
128
鈥?V
S
+ 1.4
鈥?V
S
+ 1.6
15
0.55
鈥?V
S
+ 1.6
90
105
118
133
112
125
132
140
1.1
1.6
+ V
S
鈥?1.3
+ V
S
鈥?1.5
20
0.95
+ V
S
鈥?1.6
81
95
112
112
95
115
120
125
鈥?V
S
+ 1.4
鈥?V
S
+ 1.6
15
0.55
鈥?V
S
+ 1.6
90
105
118
133
112
125
132
140
1.1
1.6
+ V
S
鈥?1.3
+ V
S
鈥?1.5
20
0.95
+ V
S
鈥?1.6
dB
dB
dB
dB
dB
dB
dB
dB
mA
V
V
mA
V/碌s
V
PSRR
Power Supply Rejection Ratio
I
S
V
OUT
I
OUT
SR
V
REF
Supply Current
Output Voltage Swing
Output Current
Slew Rate
REF Voltage Range
The
q
denotes specifications that apply over the full specified
temperature range.
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be imparied.
Note 2:
Does not include the effect of the external gain resistor R
G
.
Note 3:
This parameter is not 100% tested.
Note 4:
The LT1167AC/LT1167C are designed, characterized and expected
to meet the industrial temperature limits, but are not tested at 鈥?40擄C and
85擄C. I-grade parts are guaranteed.
Note 5:
This parameter is measured in a high speed automatic tester that
does not measure the thermal effects with longer time constants. The
magnitude of these thermal effects are dependent on the package used,
heat sinking and air flow conditions.
Note 6:
Hysteresis in offset voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Offset voltage hysteresis is always measured at 25擄C, but
the IC is cycled to 85擄C I-grade (or 70擄C C-grade) or 鈥?40擄C I-grade
(0擄C C-grade) before successive measurement. 60% of the parts will
pass the typical limit on the data sheet.
Note 7:
Typical parameters are defined as the 60% of the yield parameter
distribution.
5

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