澶т腑鍗庡湴鍖烘巿鏉傾綰т唬鐞嗗晢涓庢妧鏈敮鎸佸崟錕?frac12;錕斤細(xì)娣卞湷甯?jìng)鑻遍攼鎭┛U戞妧鏈夐檺鍏徃銆傛榪庢潵鐢?shù)鍜ㄨ锛屾彁渚涜祫鏂欎笌鏍峰搧銆?/div>
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MDT10F630
5.
鎸囦護(hù)淇℃伅
ROM
(瀛楄妭)
1.0K
1.0K
1.0K
1.0K
RAM EEPROM
(瀛楄妭 s)
(瀛楄妭)
64
64
64
64
128
128
128
128
瀹氭椂鍣?/div>
(8/16
錕?frac12;錕?
1/1
1/1
1/1
1/1
鍨嬪彿
I/O
姣旇緝鍣?/div>
灝佽
鏍囧織
寮曡剼
4
鏄?/div>
PA3
鐨勫姛
錕?frac12;
寮曡剼
4
鏄?MCLR 澶?/div>
閮ㄥ錕?frac12;錕藉姛錕?frac12;
寮曡剼
4
鏄?/div>
PA3
鐨勫姛
錕?frac12;
寮曡剼
4
鏄?MCLR 澶?/div>
閮ㄥ錕?frac12;錕藉姛錕?frac12;
MDT10F630P11
MDT10F630P13
MDT10F630S11
MDT10F630S13
12
11
12
11
1
1
1
1
14-DIP
14-DIP
14-SOP
14-SOP
6.
鏁版嵁鍧楀浘琛?/div>
EEPROM
128脳8
Stack Eight
Levels
8 bits
Flash ROM
1024 脳14
10 bits
Comparator
RAM
64 脳8
PA3
14 bits
Program
Counters
Instruction
Register
Special
Register
Port A
PA0~PA2
PA4~PA5
5 bits
Port C
Instruction
Decoder
Data
8bit
PC0~PC5
6 bits
Oscillator
circuit
Control
Circuit
D0~D7
TMR0
8 Bits
TMR1
16 Bits
Power on Reset
Power Down Reset
Watchdog Timer
Working Register
ALU
Status Register
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.enroo.com
P.2
2008/4
Ver. 1.0
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MDT10F630S11相關(guān)型號(hào)PDF文件下載