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MCP6546T-I/LT Datasheet

  • MCP6546T-I/LT

  • COMP, OPEN DRAIN, 1.6V, SINGLE, SC70-5; Comparator Type:Sub-...

  • 32頁

  • Microchip   Microchip

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MCP6546/6R/6U/7/8/9
4.0
APPLICATIONS INFORMATION
D
1
V
1
R
1
D
2
V
2
R
2
R
1
鈮?/div>
R
2
鈮?/div>
R
3
V
SS
鈥?(minimum expected V
1
)
2 mA
V
SS
鈥?(minimum expected V
2
)
2 mA
The MCP6546/7/8/9 family of push-pull output
comparators are fabricated on Microchip鈥檚 state-of-the-
art CMOS process. They are suitable for a wide range
of applications requiring very low power consumption.
V
DD
+
MCP6G0X
4.1
4.1.1
Comparator Inputs
PHASE REVERSAL
鈥?/div>
V
OUT
The MCP6546/6R/6U/7/8/9 comparator family uses
CMOS transistors at the input. They are designed to
prevent phase inversion when the input pins exceed
the supply voltages.
Figure 2-3
shows an input voltage
exceeding both supplies with no resulting phase
inversion.
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
FIGURE 4-2:
Protecting the Analog Inputs.
The ESD protection on the inputs can be depicted as
shown in
Figure 4-1.
This structure was chosen to pro-
tect the input transistors, and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
V
SS
. They also clamp any voltages that go too far
above V
DD
; their breakdown voltage is high enough to
allow normal operation, and low enough to bypass ESD
events within the specified limits.
V
DD
Bond
Pad
It is also possible to connect the diodes to the left of the
resistors R
1
and R
2
. In this case, the currents through
the diodes D
1
and D
2
need to be limited by some other
mechanism. The resistor then serves as in-rush current
limiter; the DC current into the input pins (V
IN
+ and
V
IN
鈥? should be very small.
A significant amount of current can flow out of the
inputs when the common mode voltage (V
CM
) is below
ground (V
SS
); see
Figure 2-42.
Applications that are
high impedance may need to limit the useable voltage
range.
4.1.3
Input
Stage
Bond
Pad
NORMAL OPERATION
V
IN
+ Bond
Pad
V
IN
鈥?/div>
V
SS
Bond
Pad
The input stage of this family of devices uses two
differential input stages in parallel: one operates at low
input voltages and the other at high input voltages.
With this topology, the input voltage is 0.3V above V
DD
and 0.3V below V
SS
. The input offset voltage is
measured at both V
SS
- 0.3V and V
DD
+ 0.3V to ensure
proper operation.
The MCP6546/6R/6U/7/8/9 family has internally-set
hysteresis that is small enough to maintain input offset
accuracy (<7 mV), and large enough to eliminate
output chattering caused by the comparator鈥檚 own
input noise voltage (200 碌V
P-P
).
Figure 4-3
illustrates
this capability.
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
In order to prevent damage and/or improper operation
of these amplifiers, the circuits they are in must limit the
currents (and voltages) at the V
IN
+ and V
IN
鈥?pins (see
Absolute Maximum Ratings 鈥?/span>
at the beginning of
Section 1.0 鈥淓lectrical Characteristics鈥?.
Figure 4-3
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(V
IN
+ and V
IN
鈥? from going too far below ground, and
the resistors R
1
and R
2
limit the possible current drawn
out of the input pin. Diodes D
1
and D
2
prevent the input
pin (V
IN
+ and V
IN
鈥? from going too far above V
DD
.
When implemented as shown, resistors R
1
and R
2
also
limit the current through D
1
and D
2
.
漏
2006 Microchip Technology Inc.
DS21714E-page 13

MCP6546T-I/LT 產(chǎn)品屬性

  • Microchip

  • 校驗器 IC

  • 1 Channel

  • Analog Comparators

  • Open Drain

  • 4 us

  • 7 mV

  • 1 uA

  • + 85 C

  • SMD/SMT

  • SC-70-5

  • Reel

  • - 40 C

  • 3000

  • 5.5 V

  • 1.6 V

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