作者： microe 于 2005/12/1 4:30:00 發(fā)布：
some points
最近在做比較器.在仿真過程中我在輸入端加入了50mV的失調(diào)電壓.工藝是采用csmc 0.6um mixed PROCESS.我不知道實際作出來的失調(diào)電壓會有多少,那位有經(jīng)驗值,可否提供一下.謝謝!工作環(huán)境的溫度大約在55度.
-- the offset is dependent on design and PROCESS. usually u can use monte carlo sim to get it, assuming MODEL file has monte carlo parameters.
generally for CMOS offset is around 10mV. a common method to reduce offset is increasing W and L.
u can derive the offset relation with delta W,delta L,delta Vth from I-V relation. it is similar to error transfer function. check any PHYSICS lab book for that.
另外,比較器通常都需要仿那些參數(shù)?我采用7管結(jié)構(gòu),仿真出的延遲時間有2us,為什么有這么大?我直接用pwl源加的階躍信號.
-- check any commercial comparator datasheet for specifications. i have no idea about ur delay problem.
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