Introduction	前言
[001] There are considerably more problems involved in the successful design of Mixed Signal CIRCUITry than mere CIRCUIT design. If we design an electronic CIRCUIT as a diagram, whether we use an old-fashioned pencil and paper or, as is the modern fashion, a COMPUTER and SPICE or some similar SOFTWARE, we are overlooking one of the most important factors in the design of successful HARDWARE, namely that what we are designing is HARDWARE, and until it has been shown to work successfully in fact, rather than in simulation, our design is not complete.	[001] 與一般電路相比，設計混合信號電路時需要注意的地方更多。硬件設計不是紙上談兵。拿筆在紙上畫畫圖，或者時髦地在計算機上用SPICE之類的軟件工具搞搞仿真，不能算是完整的硬件設計，因為這種方式忽略了硬件設計最重要的特征——“硬件實現(xiàn)”。換句話說，仿真驗證只是設計的一個階段，實踐才能檢驗設計是否成功。
[002] This section of our seminar considers the problems which arise when reality reacts on a design which theory and MODELing have shown to be satisfactory. What, in fact, has happened is that our MODEL probably does not consider the effects of non-ideal components and of spurious or parasitic components resulting from the CIRCUIT layout which has been used. It is not, perhaps, too fanciful to describe this as the section of the Seminar dealing with Murphy's Law.	[002] 本文要探討的是那些符合理論和數(shù)學模型的設計在實踐中遇到的各種問題。這些問題的原因是理論或模型可能并未考慮到的元器件的非理想特性，以及與電路板布局布線相生相伴的寄生特性。這些問題與其說神秘莫測，不如說是Murphy定律的體現(xiàn)。
[003] Murphy's Law, though frequently expressed humorously, is not entirely a joke. It is a recognition of the complexity of physical SYSTEMs and a warning against over-simplification and is comparable with Einstein's warning that "Everything should be made as simple as possible - but no simpler".'	[003] 人們常常會拿Murphy定律開玩笑，但它真的不是玩笑。它體現(xiàn)出人們對自然界復雜性的認識，體現(xiàn)出對“過度簡化”方法論的防范，其意義堪與愛因斯坦的警句——“Everything should be made as simple as possible - but no simpler”——相提并論。
[004] This section of the seminar discusses the various physical effects which must be considered in the design of the HARDWARE of mixed signal SYSTEMs. Often such consideration will amount to a quick calculation to demonstrate that further consideration is not necessary, but sometimes extensive analysis, or even actual experiments, will be necessary. However, the quick calculation must not be omitted, since problem are rarely obvious and often unexpected. The effects which must be considered will include many basic law of PHYSICS.	[004] 本文將介紹混合信號電路硬件設計相關的物理現(xiàn)象。有時候，考慮這些現(xiàn)象的分析結果與簡化分析的結果相比差別不大，但是有時候，詳細分析甚至搭試卻是十分必要的。當然，簡化分析不應該被忽視，因為麻煩經(jīng)常是隱蔽和出乎意料的。[疑慮：此句前后意思似乎不搭。]] 討論這些現(xiàn)象將用到以下一些物理學定律：
[005] We therefore shall use as a section heading the major phenomenon considered in the section, but in the most general sense (for example, under "Resistance” we shall consider the non-ideal behavior of RESISTORs, including noise, thermo- ELECTRIC and inductive effects, which are not strictly issues of Ohm's Law).	[005] 本文各章節(jié)的標題將是各物理現(xiàn)象的主要特征，但是在討論的時候將更為全面。（以“電阻”一章為例，本文（除了討論電阻，還要）討論電阻的非線性，包括噪聲、熱偶現(xiàn)象以及電感特性，而歐姆定律并不涉及這些問題。）
[006] When considering the effects of CIRCUIT conditions we are, of course, interested in their effects on the performance of the SYSTEM as a whole. Failure to allow for this is at the root of many of the problem which this section considers. For example, a l6-bit SYSTEM divides its full-scale (FS) range into 216 or 65536, which means that 1 LSB in a 10V FS SYSTEM is ONLY 153 uV. If we assume that we can tolerate errors of no more than 0.5 LSB, this calculation tells us that in a 16-bit SYSTEM with 10 V FS we must KEEP the total error to less than 76 pV, which is approximately equal to the thermo-ELECTRIC voltage in a nichrome wirewound RESISTOR with copper/nickel leads having about 2℃ temperature difference between its ends.	[006] 當評價一個電路的性能時，設計者當然會關注該電路在整個系統(tǒng)中的表現(xiàn)。很多麻煩的根源就是在于設計初期沒有這樣通盤考慮，本文要討論的就是這個問題。例如，16位采樣系統(tǒng)的量程被劃分為216即65536份，如果量程是10V，1LSB就相當于153uV。假設電路的噪聲必須小于0.5LSB，按照前面的計算，這意味著在10V量程的電路中必須將噪聲控制在76uV以下，而這個電壓大致與（鎳鉻鐵合金）線繞電阻的兩個引腳（銅/鎳）間溫差2C時的熱噪聲相當。
[007] Binary LOGIC CIRCUITry, on the other hand, has ONLY two states, LOGIC 0 and LOGIC 1, and noire immunity of hundreds or thousands of millvolts. This is why CIRCUIT designers who have ONLY worked with DIGITAL CIRCUITry tend to overlook the source of error which we are considering in this section of the seminar.	[007] 另一方面，二進制邏輯電路只有兩個穩(wěn)態(tài)——邏輯0和邏輯1，其噪聲容限可以達到數(shù)百至數(shù)千毫伏。正因如此，有些只做過數(shù)字電路設計的工程師根本不會想到本章將要提到的那些誤差源。
[008] Figure 11.4 lists the sizes of 0.5 LSB at various resolutions (the VALUEs are given for 10 V fullscale since this is a classical converter range and where LSBs are given a mV VALUE in this section of the seminar a 10 V FS is assumed unless explicitly stated otherwise - scaling to other VALUEs of FS is a trivial operation). Every ANALOG designer should be familiar with this table, since not ONLY does it allow the comparison of converters which are specified in different ways but it also indicates whether a design is reasonable or not - if noise or SYSTEM errors amount to 1 mV there is little point in designing a SYSTEM with more than 12-bits resolution.	[008] 圖11.4給出了不同分辨率條件下0.5LSB對應的變化量。（鑒于目前模數(shù)轉換器典型的滿量程范圍是10V，所以表格中的數(shù)據(jù)都是按照滿量程10V計算。本文中，如果沒有特別說明，當1LSB為mV量級時，其滿量程范圍都是10V，滿量程不等于10V的情況可以參照本例推算。）每位模擬電路設計師都應該對這張表諳熟于心，這樣做不但有助于模數(shù)轉換器的選型（避開不同評價標準的影響），而且可以判斷一個設計是否可行——例如，如果噪聲和系統(tǒng)誤差達到1mV，那么在該設計中就沒有必要采用12位以上的分辨率。

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Resistance	電阻
Resistance of Conductors	導體的電阻
[009]Every ENGINEER is familiar with resistors -little cylinders with wire ends - although perhaps fewer are aware of all their idiosyncrasies. Far too few ENGINEERs consider that all the wires and PC tracks with which their systems and circuits are assembled are also resistors.	[009]每個工程師都熟悉電阻器——圓柱形，兩端有引線，不過完全熟悉電阻器各項特性的人可能不多，而能意識到系統(tǒng)中的電線和印刷電路導線都是電阻的人就更少了。
[010]At 25℃ the resistivity of PURE copper is 1.724×10-6 ohm/cm. The thickness of STANDARD (1 ounce) PCB foil is 0.038 mm (0.0015"). The resistance of STANDARD PCB copper is therefore 0.45 milliohms/square, which implies a resistance for the 0.25 mm track frequently used in COMPUTER designed DIGITAL circuitry of 18 milliohms/cm, which is quite large. Moreover the temprature cofficient of resistance for copper is about 0.4% /℃  around room temperature, which can be a further inconvenience.	[010] 在25℃條件下，純銅的電阻率為1.724×10-6ohm/cm。標準（1盎司）PCB銅箔的厚度為0.038mm(0.0015英寸)，因此，標準PCB銅箔的電阻率為0.45mohm/cm2。CAD軟件中數(shù)字電路的線寬一般為0.25mm，按此推算其電阻率為18mohm/cm，這是一個相當大的值。另外，在室溫范圍，銅的電阻率的溫度系數(shù)大約是0.4%/℃，這也會影響導線的電阻。
[011] As an illustration of the effect of PCB track resistance consider a 16-bit ADC with a 5k ohm input resistance which has 5 cm of 0.25 mm PCB track between it and its signal source. This track has a resistance of approximately 0.09 ohms and introduces a gain error of 0.09 ohms / 5000 ohms (0.0018%) which is well over 1 LSB (0.0015% for 16 bits).	[011] 下面用一個16位模數(shù)轉換器的例子來說明PCB導線電阻對性能的影響。假設信號源到ADC的導線長度為5cm，線寬0.25mm，ADC的輸入電阻為5kΩ。那么導線的電阻大約是0.09ohm，將產生0.09/5000（0.0018%）的增益誤差，這已經(jīng)超出了1LSB（對于16位ADC，1LSB為0.0015%）。

SKIN EFFECT	趨膚效應
[012]This, of course, is a DC effect. At high frequencies we must also consider the "skin effect" where inductive effects cause currents to flow ONLY in the surface of conductors. This has the effect of increasing the resistance of a conductor at high frequencies (note that this effect is separate from the increase in impedance due to the effects of the self-inductance of conductors as frequency is increased – that will be dealt with later). Skin effect is quite a complex phenomenon and detailed calculations are beyond the scope of this seminar. However a GOOD approximation for copper is that the skin depth in centimeters isEquation P3-1.	[012[b]][譯者疑慮]趨膚效應當然是一個直流現(xiàn)象。[/b]趨膚效應的定義是——在傳輸高頻信號時，由于導體自身的電感特性，電流的流動將集中在導體的表層。這意味著在傳輸高頻信號時，導體的電阻會增加。（請注意趨膚效應與分布電感的區(qū)別，分布電感是指在頻率提高時，因導體自感而造成的阻抗增加。分布電感將在以后的章節(jié)討論。）趨膚效應是相當復雜的物理現(xiàn)象，與其相關的定量分析不是本文的主題。不過，銅導體的趨膚深度可以用公式P3-1近似推算：
[013] Assuming that skin effects become important when the skin depth is less than 50% of the thickness of the PC foil this tells us that for normal 0.038 mm PC foil we must be concerned about skin effects at frequencies above approximately 12 MHz.	[013] 假定，僅當趨膚深度小于印刷導線銅箔厚度的50%的時候，才需要考慮趨膚效應的影響。換句話說，對于銅箔厚度0.038mm的普通PCB，只有當信號頻率高于12MHZ時才需要考慮趨膚效應。
[014] Where skin effect is important the resis- tance per square for copper is ( Equation P3-2 )  ohms per square.	[014] 在考慮趨膚效應時，每平方？[[/B]疑慮：這里沒有指出面積單位]銅箔的電阻可按公式P3-E2計算：
[015] When calculating skin effects in PCBs it is important to remember that current flows in both sides of the PC foil (this is not necessar- ily the case in microstrip lines) so the resis- tance per square of PC foil is half the above VALUE.	[015] 請注意，在衡量趨膚效應對PCB的影響時，因為電流會在印刷導線的上下表面同時流動（對于微帶線就不一定了），所以按上面公式計算出的電阻值應減半。

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VOLTAGE DROP IN SIGNAL LEADS - "KELVIN" FEEDBACK	“開爾文”反饋——抵消信號線上的壓降
[016]  The gain error resulting from resistive voltage drop in signal LEADs is important ONLY at high resolutions (as in the example) or where large signal currents flow. Where the load impedance is constant and resistive it can be compensated by adjusting the overall SYSTEM gain. In other circumstances it may often be removed by the use of "KELVIN" or 'voltage sensing" feedback.	[016]  在信號電流非常大或者精度要求非常高（如上例）的場合，信號線內阻上的電壓降會引入增益誤差。當負載為純阻性負載且阻值恒定時，這個誤差可以通過調整電路的總增益來補償。其他情況下，可以用“開爾文”法（[[/B]疑慮]“電壓感應”反饋法）去除。[B]
[017]  Separate force and sense connections at a load remove any errors resulting from volt- age drops in the force LEAD, but, of course, may ONLY be used in SYSTEMs where there is negative feedback. It is also impossible to use such an arrangement to drive two or more loads with equal accuracy since feedback may ONLY be taken from one point.	[017]  在負載端引出兩根導線——一根傳輸線，一根感應線——可以抵消傳輸線上的電壓降，不過這種方法僅適用于負反饋電路。此外，在多個負載條件下，因為反饋點只能來自于其中一個負載，所以不能保證每個負載都獲得同樣高的信號精度。

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LEAKAGE IN INSULATORS	絕緣體漏電
[018] Just as conductors are improperly viewed as superconductors, so are insulators often mistakenly treated as perfect insulators, rather than very high resistances, which is the more accurate MODEL.	[018] 有人會把所謂“導體”視為超導體，同樣也會把所謂“絕緣體”看作完全不導電的介質。其實準確說來，絕緣體是一些電阻非常大的介質。
[019] Most printed CIRCUIT board materials are very GOOD insulators, but they are not perfect, and inadequately cleaned PCB material may be quite a poor insulator. Furthermore, PCBs are anisotropic even on a clean PCB different parts of the surface may have different resistivities, and the BULK resistance (between two plated through holes, for in. stance) is generally lower than the surface resistance between two tracks.	[019] 絕大多數(shù)的PCB板材都是性能優(yōu)良的絕緣體，但是它們也有弱點：首先，如果PCB板（表面）不夠清潔，其絕緣性能將大大降低；其次，由于PCB板材的各向異性，即便是清潔的PCB板，其表面不同部位的絕緣電阻也不相同；最后，PCB的內部電阻（BULK resistance）（例如兩個金屬化孔之間的電阻）一般要低于印刷導線間的表面電阻。
[020] Since the insulation resistance is so variable (and it will vary further with temperature and HUMIDITY) it is hard to predict in any particular circumstances but it is safe to assume that it is unlikely that the resistance between two conductors on a clean PCB will drop below 10^10 - 10^11 ohms, and with Teflon PCB material (which is very expensive) will usually be over 10^12 ohms.	[020] 絕緣電阻會隨著外部環(huán)境因素變化（溫度、濕度都會影響其大�。�，因此想要準確計算各種條件下的絕緣電阻是非常困難的。不過，對于清潔的PCB板來說，印刷導線間的絕緣電阻不會低于1010~1011歐，Teflon材質的PCB（價格昂貴）更是會高于1012歐。

GUARD RINGS	保護環(huán)
[021] In applications where high impedances and very low currents are involved a guard ring may be used to minimize the effects of low insulation resistance. If critical high impedance nodes are surrounded by a ring of conductor  which is at (or very CLOSE to) the potential of the node itself then the leakage current at the node will be minimized. If the node is at, or near to, ground then a grounded guard ring will be appropriate, if it is at some other potential it may be necessary to use a high input impedance buffer AMPLIFIER, with its input connected to the node, to force the guard ring to the node potential. It is obvious that, in general, guard rings should be on both sides of the PCB with plated-through holes.	[021] 保護環(huán)用在那些高阻抗或電流非常微弱的電路中，用于減輕因絕緣電阻不夠高而產生的（漏電）問題。其原理是：用環(huán)形導線把關鍵的高阻抗節(jié)點包圍起來，假如環(huán)的電位等于（或非常接近于）該節(jié)點的電位，那么節(jié)點周圍的漏電流將最小。如果被保護的節(jié)點的電位是（或接近）零電位，采用地線保護環(huán)最為合適；如果節(jié)點電位是其他值，那么可以用高輸入阻抗放大器組成緩沖器，輸入端連接該節(jié)點，輸出端連接保護環(huán)。顯然，一般情況下，在PCB的上下表面都應設計保護環(huán)，二者通過金屬化孔相連。
[022] Nodes which are sufficiently sensitive to require guard rings should not contain plated through holes (unless the PCB is made of teflon) because, as mentioned above, the BULK resistivity of PCB material is less than the surface resistivity.	[022] 如前文所述——PCB的內部電阻率小于表面電阻率，因此，受保護節(jié)點處絕不能打過孔（除非PCB采用Teflon板材）。
[023] An alternative to the use of a guard ring is to use teflon stand-off insulater(s) to SUPPORT the high impedance point(s). If VIRGIN teflon is used insulation resistance of around 10^15 ohms is possible ('VIRGIN teflon' is a solid piece of new teflon material which has been machined to shape and has not been welded together from powder or grains). The material of the rest of the CIRCUIT board need not have particularly high insulation resistance.	[023] 可以用Teflon墊片取代保護環(huán)，保護那些高阻抗的電氣節(jié)點。VIRGIN Teflon材料的電阻可達1015歐（這是一種新型的固體片狀Teflon材料，它并非由粉末或顆粒狀原料熔融加工而成）。采用這種方法的優(yōu)點是，電路板其他部分的絕緣電阻不必非常高。

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Parasitic effects in Resistors	電阻器寄生效應
[031]  When we MODEL a CIRCUIT, either informally or with a program such as SPICE, we generally assume that a RESISTOR is a simple resistant. In fact any RESISTOR is a much more complex DEVICE containing, at the very least, an inductance, a noise source, a CAPACITOR and two thermocouples.	[031]  在分析電路的時候，不論是粗略分析還是借助于SPICE這樣的軟件，通常都會視電阻器為純電阻。然而，電阻器的電路模型遠不是這么簡單，它包含更多的內容，至少包含一個電感、一個噪聲源和兩個熱電偶。
Inductive RESISTORs	電阻器的電感特性
[032]  All RESISTORs have some inductance (as we shall see, a straight piece of wire has some inductance) but wire-wound RESISTORs actually consist of a COIL of wire, which must inevitably be inductive. Even if the COIL is "non- inductive' and consists of N clockwise turns and N anticlockwise turns there will still be some mismatch and residual inductance. Residual inductance values of up to 20uH can be expected in "non-inductive" wire- wound RESISTORs with values below 10 k ohms, although above 10k ohms the reactance of such a RESISTOR is more likely to be a capacitance of around 5 pF.	[032]  電阻器多多少少都有些電感（即便是一段直導線也有電感），線繞電阻本身就是一個線圈，因此必定具有電感特性。所謂“無電感”線繞電阻（一半匝數(shù)的線圈按順時針方向纏，另一半按逆時針方向纏，從而使兩部分線圈產生的電感互相抵消）也會因為某些不匹配而帶有電感。10k ohms以下的“無電感”線繞電阻器的電感量不大于20uH，而10k ohms以上的電阻器，其電抗特性體現(xiàn)為電容，大約為5pF。
[033]  Some film RESISTORs are also inductive, consisting of a spiral of resistive material on a cylindrical ceramic body. Again values of a few uH are typical. High frequency CIRCUITs must not use inductive RESISTORs since their impedance is not equal to their resistance and, indeed, varies with frequency. Even low frequency CIRCUITry, where the inductance of the RESISTORs would not seem to be a problem, may suffer from instability arising from unforeseen HF effects of RESISTOR inductance (the transistors used in low frequency op-amps frequently have Ft of up to 1 GHz).	[033]  有些薄膜電阻器，是通過在電阻性薄膜上進行螺旋的槽式切割而制成，通常其電感量為幾個uH。在高頻電路中不能使用電感較大的電阻器，因為它們的阻抗不等于電阻，而且大小隨頻率而變化。即使是在低頻電路中，雖然電阻的電抗分量很小，但是由于某些難于預見的高頻源（低頻運放內的晶體管的頻率高達1GHz），仍然會影響電路的穩(wěn)定性。 [譯者注]：部分文字摘錄自《ADI產品技術指南》（高光天 1997）P183

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