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16-channel GPS Correlator
鈥?8192 Search Bins with GPS Acquisition Accelerator
鈥?Accuracy: 2.5m CEP (Stand-Alone, S/A off)
鈥?Time to First Fix: 34s (Cold Start)
鈥?Acquisition Sensitivity: 鈥?40 dBm
鈥?Tracking Sensitivity: 鈥?50 dBm
Utilizes the ARM7TDMI
廬
ARM
廬
Thumb
廬
Processor Core
鈥?High-performance 32-bit RISC Architecture
鈥?High-density 16-bit Instruction Set
鈥?Embedded ICE (In-circuit Emulator)
128 Kbyte Internal RAM
384 Kbyte Internal ROM with u-blox GPS Firmware
6-channel Peripheral Data Controller (PDC)
8-level Priority, Individually Maskable, Vectored Interrupt Controller
鈥?2 External Interrupts
24 User-programmable I/O Lines
1 USB Device Port
鈥?Universal Serial Bus (USB) V2.0 Full-speed Device
鈥?Embedded USB V2.0 Full-speed Transceiver
鈥?Suspend/Resume Logic
鈥?Ping-pong Mode for Isochronous and Bulk Endpoints
2 USARTs
鈥?2 Dedicated Peripheral Data Controller (PDC) Channels per USART
Master/Slave SPI Interface
鈥?2 Dedicated Peripheral Data Controller (PDC) Channels
鈥?8-bit to 16-bit Programmable Data Length
鈥?4 External Slave Chip Selects
Programmable Watchdog Timer
Advanced Power Management Controller (APMC)
鈥?Peripherals Can Be Deactivated Individually
鈥?Geared Master Clock to Reduce Power Consumption
鈥?Sleep State with Disabled Master Clock
鈥?Hibernate State with 32.768 kHz Master Clock
Real Time Clock (RTC)
2.3V to 3.6V or 1.8V Core Supply Voltage
Includes Power Supervisor
1.8V to 3.3V User-definable I/O Voltage for Several GPIOs with 5V Tolerance
4 Kbytes Battery Backup Memory
8 mm
脳
8 mm 56 Pin QFN56 Package
Pb-free, RoHS-compliant, Green
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GPS Baseband
Processor
ATR0622
Summary
Preliminary
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Rev. 4891CS鈥揋PS鈥?1/06
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ATR0622相關(guān)型號(hào)PDF文件下載
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型號(hào)
版本
描述
廠商
下載
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英文版
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ETC