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MM74HCT08_05 Datasheet

  • MM74HCT08_05

  • Fairchild Semiconductor [Quad 2-Input AND Gate]

  • 84.08KB

  • FAIRCHILD

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MM74HCT08 Quad 2-Input AND Gate
December 1983
Revised January 2005
MM74HCT08
Quad 2-Input AND Gate
General Description
The MM74HCT08 is a logic function fabricated by using
advanced silicon-gate CMOS technology which provides
the inherent benefits of CMOS鈥攍ow quiescent power and
wide power supply range. This device is input and output
characteristic and pinout compatible with standard 74LS
logic families. All inputs are protected from static discharge
damage by internal diodes to V
CC
and ground.
MM74HCT devices are intended to interface between TTL
and NMOS components and standard CMOS devices.
These parts are also plug-in replacements for LS-TTL
devices and can be used to reduce power consumption in
existing designs.
Features
s
TTL, LS pin-out and threshold compatible
s
Fast switching: t
PLH
, t
PHL
=
12 ns (typ)
s
Low power: 10
碌
W at DC
s
High fan-out, 10 LS-TTL loads
Ordering Code:
Order Number
MM74HCT08M
MM74HCT08MX_NL
MM74HCT08SJ
MM74HCT08MTC
MM74HCT08MTCX_NL
MM74HCT08N
Package
Number
M14A
M14A
M14D
MTC14
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Diagram
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
漏 2005 Fairchild Semiconductor Corporation
DS005754
www.fairchildsemi.com

MM74HCT08_05 PDF文件相關(guān)型號(hào)

MM74HCT08M,MM74HCT08MTCX_NL,MM74HCT08MX_NL

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